Accessibility statement

Systems & Devices 3 - COM00018I

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  • Department: Computer Science
  • Module co-ordinator: Dr. Ian Gray
  • Credit value: 20 credits
  • Credit level: I
  • Academic year of delivery: 2020-21

Module summary

Advanced Computer Systems

Module will run

Occurrence Teaching cycle
A Spring Term 2020-21 to Summer Term 2020-21

Module aims

This module continues the Systems and Devices stream by considering advanced computer systems in terms of their structure and how it affects their programming. To this point, the systems introduced have been basic uniprocessors with simple memory. The module starts by introducing the concept of multiple processor architectures, pipelined and superscalar processors, systems-on-chip and advanced memory structures, including caches.

The rest of the module considers how these hardware features affect the way that such modern systems are efficiently programmed. Issues of programming for pipelines, caches, etc. are considered. Then how processes running in parallel on separate processors can share underlying resources safely. Finally, the module considers building blocks for parallel programming, e.g. threads and communication. It will also consider how such constructs map to processor instructions. The module will consider real-world examples throughout.

Module learning outcomes

 

S301

Appreciate how, and why, the hardware structure of multiprocessor architectures differs from the architectures discussed in S&D1. Use this knowledge to develop software applications for such architectures.

S302

Demonstrate the ability to optimise software for advanced hardware features like caches, branch predictors, and pipelines.

S303

Analyse the requirements for how the resources of multiprocessor systems can be shared safely amongst application processes. Show how this is supported by hardware extensions to the basic architecture from S&D1.

S304

 Demonstrate how multiprocessor architectures can be effectively exploited by programming using both processes and threads. Use safe communication between processes and between threads.

S305

Demonstrate through software development, how data structures are laid out in memory, how they can be accessed from a program, and how processor instructions are generated to manipulate them.

 

Assessment

Task Length % of module mark
Open Examination
Systems & Devices 3 Open Exam
N/A 60
University - closed examination
Systems & Devices 3 Closed Exam
2 hours 40

Special assessment rules

None

Reassessment

Task Length % of module mark
Open Examination
Systems & Devices 3 Open Exam
N/A 60
University - closed examination
Systems & Devices 3 Closed Exam
2 hours 40

Module feedback

Feedback is provided through work in practical sessions, and after the final assessment as per normal University guidelines

Indicative reading

**** H. Abelson, and G.J. Sussman, Structure and Interpretation of Computer Programs, MIT Press, 1996

*** R.W. Sebesta, Concepts of Programming Languages, Addison Wesley, 2009

*** A. Burns and G. Davis, Concurrent Programming, Addison-Wesley, 1993

** D. Watt and W. Findlay, Programming Language Design Concepts, Wiley, 2004

** T.W. Pratt and M.V. Zelkowitz, Programming Languages: Design and Implementation, Prentice Hall, 2001

** D. Lea, Concurrent Programming in Java, Addison Wesley, 1996

** A. Burns and A. Wellings, Concurrent and Real-Time Programming in Ada, CUP, 2007

** F. Casarini and S. Thompson, Erlang Programming, O'Reilly, 2009

** A. Burns and A. Wellings, Real-Time Systems and Languages 4/e, Addison Wesley



The information on this page is indicative of the module that is currently on offer. The University is constantly exploring ways to enhance and improve its degree programmes and therefore reserves the right to make variations to the content and method of delivery of modules, and to discontinue modules, if such action is reasonably considered to be necessary by the University. Where appropriate, the University will notify and consult with affected students in advance about any changes that are required in line with the University's policy on the Approval of Modifications to Existing Taught Programmes of Study.