Accessibility statement

Reconfigurable devices and systems: projects

Our research in this area covers a number of aspects of microelectronics design, including research into VLSI silicon based design of novel hardware architectures (eg novel FPGA designs), biologically inspired architectures and computation models for adaptable and fault-tolerant designs. It includes the development of design tools and/or technologies, including synthesis, simulation and optimisation of reconfigurable hardware. Our work also involves the design of many-core architectures and software environments based around such architectures.

Continuous on-line adaptation in many-core systems: from graceful degradation to graceful amelioration

Members: Dr Gianluca Tempesti (PI) (York), Dr Martin Trefzer (York), Professor Andy Tyrrell (York), Dr Nizar Dahir (York), Dr Pedro Campos (York), Professor Steve Furber (Manchester), Dr Simon Davidson (Manchester), Dr Indar Sugiarto (Manchester), Professor Bashir Al-Hashimi (Southampton), Dr Geoff Merrett (Southampton)
Funded by:
EPSRC (EP/L000563/1)
Partners: The University of Manchester, University of Southampton


Imagine a many-core system with thousands or millions of processing nodes that gets better and better with time at executing an application, “gracefully” providing optimal power usage while maximizing performance levels and tolerating component failures. Applications running on this system would be able to autonomously vary the number of nodes in use. The GRACEFUL project aims at investigating how such mechanisms can represent crucial enabling technologies for many-core systems.

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EPSRC Platform grant: Bio-inspired Adaptive Architectures and Systems

Members: Prof AM. Tyrrell, Dr MA. Trefzer, Prof J. Timmis, Dr G. Tempesti
Funded by: EPSRC
Dates: October 2013 - September 2018


The ever-increasing complexity of highly integrated computing systems requires more and more complex levels of monitoring and control over the potentially large number of interacting resources available in order to manage and exploit them effectively. Technology innovations are driving device and systems design to consider, for example, a move from multi-core (2-10 cores) to many-core (hundreds-thousands of cores) and to design hybrid technology platforms. However, it is still neither obvious how these systems will be constructed architecturally nor how they will be controlled and programmed. Major issues related to these systems include reliability and on-line optimisation, as well as the efficient utilisation of these complex systems. The need for reliability in such systems is obvious, considering their size and the huge design and test efforts required to manage the increasing sensitivity to faults of next-generation technologies.

Here we will research into hardware and software systems whose designs are motivated by biological principles. The main activities will be in the design, evaluation and exploitation of such systems. This will concern the advancement of bio-inspired techniques to construct microelectronic systems of the future. This will cover the topology of such systems that will both be massively parallel and will be required to cope with unreliable components, such as the variability of devices resulting from the continuing reduction in feature size. The need for new manufacturing methods such as 3D fabrication and new materials such as molecular devices will be critical for the future of microelectronic system design and will form a significant part of this research.


Our long-term objective is to apply biological mechanisms, that are proven to enable stable computation with unreliable components in new nano and/or molecular substrates, in such a way that their key features can be exploited to perform robust computation with a performance that can compete with traditional computing paradigms. We envisage achieving this goal in a number of steps including:

  1. the development of new methodologies using silicon as an affordable, accessible, state-of-the-art technology, and
  2. the integration of silicon with other (molecular) technologies in hybrid systems, thereby allowing the shift of more functionality to suitable alternative technologies .

The Platform Grant funding allows us flexibility to bring together current, distinct research threads, adapt to new, emerging areas of research, increase the effectiveness with which these are incorporated to achieve our long-term vision.



PAnDA: Programmable Analogue and Digital Array

Members: Andy M. Tyrrell, James Alfred Walker, Martin A. Trefzer
Funded by: EPSRC (ref: EP/I005838/1)
Dates: October 2010 - September 2014


PAnDA is a four-year EPSRC funded project that started in October 2010, involving the Intelligent Systems Research Group at the University of York and the Device Modelling Group at the University of Glasgow. It is also part of a special interest group including Imperial College London and the University of Southampton. Industrial partners include Xilinx and Gold Standard Simulations Ltd.

The PAnDA project focuses upon one of the greatest challenges in nano-scale electronic design: taking the physical effects of intrinsic variability into account when the shrinking of device sizes approaches atomistic levels, in order to achieve functional circuit designs. Both process and substrate variations impose major challenges on the reliable fabrication of such small devices. These variations fall into two categories; deterministic variability, which can be accurately modelled and accounted for using specific design techniques, and stochastic variability, which can only be modelled statistically and is harder to overcome.

The proposed research aims to develop understanding of how stochastic variability will affect circuit design in deep sub-micron processes and to propose novel design methodologies to overcome these intrinsic variations. The project will involve the design and fabrication of a novel reconfigurable variability tolerant architecture, which allows variability aware design and rapid prototyping by exploiting the configuration options of the architecture. These are vital steps towards the next generation of FPGA architectures.


This research aims to develop understanding of how stochastic variability will affect circuit design in deep sub-micron processes and to propose novel design methodologies to overcome these intrinsic variations. A novel reconfigurable variability tolerant architecture - Programmable Analogue and Digital Array (PAnDA) - will be developed and realised as a simulation model and in hardware, which allows variability aware design and rapid prototyping by exploiting the configuration options of the architecture. These are vital steps towards the next generation of FPGA architectures. To achieve this aim the following objectives will be pursued:

  1. Propose a variability tolerant architecture that encompasses reconfigurable analogue (Configurable Analogue Blocks - CAB) as well as digital (Configurable Logic Blocks - CLB) building blocks. This architecture is intended to provide the functionality of either a FPGA, FPAA, FPTA or a hybrid, allowing variability aware design optimisation and realisation using bio-inspired approaches.
  2. Propose an architecture to study the effects of stochastic variability on designs, by providing alternative configurations and motifs of CMOS logic in a CAB/CLB. Given the variety of design alternatives on different levels that are present in such a reconfigurable architecture, novel approaches to fault tolerant designs will also be studied.
  3. Provide a hardware platform capable of accelerating the statistical analysis of stochastic variability in circuit designs, by exploiting intrinsic variations of the chip without the need for a computationally expensive simulation.

PAnDA will be a unique architecture encompassing novel CAB and CLB designs. It will close the gap between the analogue design of standard cells and the design of reconfigurable digital systems based on standard cell libraries, by providing a design platform that is reconfigurable on both the analogue and digital levels. The focus is to configure PAnDA with digital designs and optimise them in multiple stages. Firstly, by changing the location and topology of the digital components and secondly, by manipulating the properties and improving the intrinsic variability of parts of the circuit by changing the underlying analogue and device layers. The latter is a novel approach to synthesizing designs on an FPGA, and is not possible with any currently existing commercial FPGA. This will enable us to investigate the optimisation of digital circuits on multiple layers of abstraction using novel bio-inspired approaches to fault-tolerant and variability tolerant electronic designs.


From Biology to Systems Engineering and Electronic Design

Members: Andy M. Tyrrell, Julian F. Miller, Martin A. Trefzer, Tuze Kuyucu
Funded by: EPSRC - EP/E028381/1
Dates: July 2007 - July 2010

Natural Development as an Inspiration for Electronic Design

The development of multicellular organisms from a single cell (zygote) is one of the most amazing mechanisms in biology. Without development, the complex multicellular organisms, such as humans, animals and plants, would not exist. While a single cell is a highly complex entity in itself, unicellular organisms are still vastly limited in the tasks they can achieve and are vulnerable to environmental threats. A multicellular organism, however, is capable of multi-tasking using division of labour among the cells, and is able to protect itself from environmental threats better than a unicellular organism would since the loss of a cell or few cells does not necessarily harm the organism as a whole. Hence, multicellularity is key to achieving complex and intelligent organisms capable of executing sophisticated behaviours and surviving harsh and changing environmental conditions.

In biology, development is used to create a fully functional adult organism from a highly compressed piece of information-the genotype of an organism(ie the DNA)-that is stored within a single cell. Furthermore, development is also a mechanism that maintains the stability and functionality of an organism throughout its lifetime, and not merely a genotype-phenotype encoding mechanism in biology for creating complex multicellular organisms. Thanks to multicellular development an organism is capable of surviving damage and loss of its physical parts, which otherwise would be lethal to the organism.

Artificial Development and Unconstrained Evolution in Electronic Design

This project aims to create an artificial developmental system (ADS), which is capable of growing higher-level adaptable entities without human intervention. An unconstrained evolutionary algorithm (EA) is used to evolve the genetic code of a zygote (stem cell), which is then capable of growing into a multicellular organism. As the organism grows, cells specialise in performing particular tasks depending on their environment and thereby form "organs". Speaking in terms of hardware systems, a cell is represented by a configurable circuit unit that can perform various simple tasks. These circuit units can connect to each other and form sub-circuits (organs), and the sub-circuits are part of the organism (hardware system).


Unlike in hardware evolution experiments, where the configuration of a hardware substrate is directly evolved, a circuit building instruction set (similar to DNA) is evolved in the case of hardware development. The single instructions are called genes. Genes interact with each other through proteins, which can be considered as "actions" or "messages": a gene can activate/inhibit other genes, communicate with the environment or modify the underlying circuit structure. The complexity of interactions increases with the number of genes. As a consequence, in order to translate the "DNA" into a working and adaptive hardware system, a mechanism that is able to process this gene regulatory network (GRN) is being developed in this project.

Investigating Self-Repair and Adaptation

While "growth" can be viewed as a self-specifying decompressing process from genotype to phenotype (building an entire system from a compressed instruction set), it also allows another important property: self-repair. As in biological systems, the ability to (re-)grow is the key feature to be able to replace faulty or damaged parts. A stable developmental process should therefore be able to recover from errors and adapt to environmental changes even if it is not explicitly evolved for such behaviour. Such phenomena will be investigated in this project. This will have enormous ramifications on the production of future systems; reliability and fault tolerance of systems may be greatly improved under uncertain environmental conditions.


Using Evolutionary Computation to Design the Next Generation of Nano-CMOS Systems

Members: Andy Tyrrell, James Alfred Walker, James Hilder
October 2006 - October 2010

Project Description

Progressive scaling of CMOS transistors, as tracked by the International Technology Roadmap for Semiconductors (ITRS) and captured in Moore’s law, has driven the phenomenal success of the semiconductor industry, delivering larger, faster and, cheaper circuits. Silicon technology has now entered the nano-CMOS era with 40 nm MOSFETs already in mass production and sub-10 nm transistors scheduled for production by 2018.

However the years of ‘happy scaling’ are over and the fundamental challenges that the semiconductor industry faces, at both technology and device level, will impinge deeply upon the design of future integrated circuits and systems.

EPSRC in collaboration with leading design houses, chip manufacturers and ECAD vendors is funding a £5.3M project which will apply e-Science and Grid technology to tackle some of the fundamental challenges facing nano-CMOS design. The work at York will study the impact of next generation technologies, and related parameter fluctuations, on the design of digital circuits using evolutionary computation.

Academic Partners

University of Glasgow

University of Edinburgh

University of Manchester

University of Southampton

University of York

Industrial Partners


POEtic: An Evolvable Multi-Purpose Reconfigurable Hardware Platform

Members: Andy Tyrrell

The POEtic project unites Phylogenetic (evolution), Ontogenetic (growth and development) and Epigenetic (learning) abilities within a single reconfigurable hardware device. As part of this project, this work is focused on the efficient combination of evolution and adaptation in a manner which is suitable for implementation in digital hardware. Simple, biologically inspired, Spiking Neural Networks (SNN) have been evolved to provide control signals for a mobile robot. Recent work has involved encoding within each individual's genome the spike timing dependant synaptic plasticity (STDP) update rule for each synaptic connection, where evolution then selects individuals based on their ability to adapt to their environment. Other work has involved looking at audio applications: evolving digital waveguide meshes to provide a simulation of the human vocal tract and synthetic models of plucked strings.