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Digital Engineering for MSc - ELE00121M

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  • Department: Electronic Engineering
  • Module co-ordinator: Dr. Gianluca Tempesti
  • Credit value: 10 credits
  • Credit level: M
  • Academic year of delivery: 2018-19

Module summary

The module will introduce tools and methodologies for the design of advanced digital circuits. Techniques to improve performance (pipelining, clock domain crossing, etc). and to design testable circuits (verification, fault models, design for testability, etc.) will be developed and, where possible, implemented in lab exercises.

Module will run

Occurrence Teaching cycle
A Spring Term 2018-19

Module aims

Subject content aims:

  • To provide experience in the design of complex FPGA-based circuits, taking into account performance parameters

  • To introduce the use of IP components for circuit design

  • To provide experience in the verification and simulation of complex circuits

  • To introduce concepts relative to test, verification, and fault tolerance in digital circuits

  • To define the requirements for an effective technical documentation of a circuit

Graduate skills aims:

  • To concisely and accurately report the results of experiments

Module learning outcomes

After successful completion of this module, students will:

  • Be able to use and understand the complete design flow (synthesis, place and route, floor-planning, timing analysis, etc.) required to implement complex digital designs

  • Be able to implement and use complex IP modules within a FPGA design

  • Understand advanced circuit design techniques

  • Be able to develop complex HDL testbenches for circuit verification and devise appropriate verification strategies, including post and pre route simulation

  • Appreciate the strengths and limitations of fault modelling and detection in digital circuits and integrate test logic in a design

Graduate skills learning outcomes

After successful completion of this module, students will:

  • Be able to concisely and accurately report the results of experiments

Assessment

Task Length % of module mark
Essay/coursework
Digital Engineering - Lab-based Coursework
N/A 100

Special assessment rules

None

Reassessment

Task Length % of module mark
Essay/coursework
Digital Engineering - Lab-based Coursework
N/A 100

Module feedback

Feedback on reports will be provided within six weeks of submission.

Indicative reading

Notes and readings will be provided in class.



The information on this page is indicative of the module that is currently on offer. The University is constantly exploring ways to enhance and improve its degree programmes and therefore reserves the right to make variations to the content and method of delivery of modules, and to discontinue modules, if such action is reasonably considered to be necessary by the University. Where appropriate, the University will notify and consult with affected students in advance about any changes that are required in line with the University's policy on the Approval of Modifications to Existing Taught Programmes of Study.

Coronavirus (COVID-19): changes to courses

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