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Embedded Systems for Field-Programmable Gate Array - ELE00013M

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  • Department: Electronic Engineering
  • Module co-ordinator: Dr. Ruwan Gajaweera
  • Credit value: 10 credits
  • Credit level: M
  • Academic year of delivery: 2022-23
    • See module specification for other years: 2021-22

Module will run

Occurrence Teaching period
A Spring Term 2022-23

Module aims

Subject content aims:

  • To provide a practical understanding of embedded processor-based systems through implementation of various embedded systems using FPGA platforms.
  • To understand the varying options and constraints imposed by different embedded system designs.

 

Module learning outcomes

Subject content learning outcomes
After successful completion of this module, students will:

  • Be able to program embedded systems using both high- and low-level languages.
  • Understand the issues associated with such programming (e.g., deadlocks, interrupts, I/Os).
  • Be able to map and implement DSP and other algorithms as hardware accelerators in FPGA fabric.
  • Know how to design custom peripherals for embedded microprocessors, and connect off-the-shelf peripheral components to an FPGA-based system.
  • Understand the operation of standard communication hardware (e.g. RS232, I2C, SPI, USB, Ethernet)

Module content

The trade-off between software and hardware, and between space and speed. Common embedded system peripherals, including both off-chip peripherals and System-on-Chip peripherals. Hardware design considerations (nature and speed of microprocessor, integrated or separate peripherals) and software design considerations (reliability, upgradability). Practical VHDL use. Embedded systems programming in assembler and C. Interrupt handling and I/O. Using existing IP modules and creating custom peripherals for FPGA-based embedded systems.

There are three components to the assessment:

  1. Continuous assessment of laboratory work, including appraisal of answers to questions set in the laboratory scripts

  2. An individual report on a design exercise undertaken in the laboratories

  3. An oral presentation on one aspect of the design exercise

Opportunities for formative assessment are typically provided through discussion with tutors and demonstrators during laboratory sessions.

Assessment

Task Length % of module mark
Essay/coursework
Report		 N/A 70
Oral presentation/seminar/exam
Oral Presentation		 N/A 30

Special assessment rules

None

Reassessment

Task Length % of module mark
Essay/coursework
Report		 N/A 100

Module feedback

'Feedback’ at a university level can be understood as any part of the learning process which is designed to guide your progress through your degree programme.  We aim to help you reflect on your own learning and help you feel more clear about your progress through clarifying what is expected of you in both formative and summative assessments.

A comprehensive guide to feedback and to forms of feedback is available in the Guide to Assessment Standards, Marking and Feedback.  This can be found at https://www.york.ac.uk/students/studying/assessment-and-examination/guide-to-assessment/

The Department of Electronic Engineering aims to provide some form of feedback on all formative and summative assessments that are carried out during the degree programme.  In general, feedback on any written work/assignments undertaken will be sufficient so as to indicate the nature of the changes needed in order to improve the work.  Students are provided with their examination results within 20 working days of the end of any given examination period.  The Department will also endeavour to return all coursework feedback within 20 working days of the submission deadline.  The Department would normally expect to adhere to the times given, however, it is possible that exceptional circumstances may delay feedback.  The Department will endeavour to keep such delays to a minimum.  Please note that any marks released are subject to ratification by the Board of Examiners and Senate.  Meetings at the start/end of each term provide you with an opportunity to discuss and reflect with your supervisor on your overall performance to date. 

Indicative reading

Peter J. Ashenden, The Designers Guide to VHDL

Brian W. Kernighan & Dennis M. Ritchie, The C Programming Language (2nd Edition)


The information on this page is indicative of the module that is currently on offer. The University is constantly exploring ways to enhance and improve its degree programmes and therefore reserves the right to make variations to the content and method of delivery of modules, and to discontinue modules, if such action is reasonably considered to be necessary by the University. Where appropriate, the University will notify and consult with affected students in advance about any changes that are required in line with the University's policy on the Approval of Modifications to Existing Taught Programmes of Study.