Yang Xiao

Yang Xiao

"I came to the University of York in 2010 and enrolled as a PhD student on the PAnDA (Programmable Analogue and Digital Array) project in the Intelligent Systems Research Group, under Professor Andy Tyrrell’s supervision.  My research within this project focused on the combination of evolutionary algorithm (EA) method and novel 3D transistor device layout technique applied to circuit performance and its variability optimization.

During this time I worked with transistor device designers at the forefront of their field to know how the transistor layout makes influence on circuit performance. This gave me significant insight into how to combine EA, transistor device, and the IC design method optimize circuit speed and make systems more robust. The whole research process provided me with a good chance to understand how to analyze problems and make reasonable method.

Now, I have joined the IBM Chip design centre at Beijing as a verification engineer where I am involved in POWER 9 chip verification and OpenPower chip design."

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